**Half Subtractor-**

- Half Subtractor is a combinational logic circuit that is used for the purpose of subtracting two single bit numbers.
- It contains 2 inputs and 2 outputs (difference and borrow).

**Designing a Half Subtractor-**

**Step-01:**

Identify the input and output variables-

- Input variables = A , B (either 0 or 1)
- Output variables = D , b where D = Difference and b = borrow

**Step-02:**

Draw the truth table-

Inputs | Outputs | ||

A | B | D (Difference) | b (borrow) |

0 | 0 | 0 | 0 |

0 | 1 | 1 | 1 |

1 | 0 | 1 | 0 |

1 | 1 | 0 | 0 |

**Truth Table**

**Step-03:**

Draw the K-maps using the above truth table and determine the simplified Boolean expressions-

**Step-04:**

Draw the logic diagram-

**Logic Diagram**

Here, Half Subtractor has been implemented using 1 XOR gate, 1 NOR gate and 1 AND gate.

**Limitation of Half Subtractor-**

Half Subtractors do not take into account “Borrow-in” from the previous circuit when we perform the subtraction of multiple number of bits.

This is a major drawback of half subtractors because real time scenarios involve subtracting the multiple number of bits which can not be accomplished using half subtractors.

To overcome this drawback, **Full Subtractor** comes into play.

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