Half Subtractor | Definition | Circuit Diagram | Truth Table

Half Subtractor-

 

• Half Subtractor is a combinational logic circuit.
• It is used for the purpose of subtracting two single bit numbers.
• It contains 2 inputs and 2 outputs (difference and borrow).

 

 

Half Subtractor Designing-

 

Half subtractor is designed in the following steps-

 

Step-01:

 

Identify the input and output variables-

• Input variables = A, B (either 0 or 1)
• Output variables = D, b where D = Difference and b = borrow

 

Step-02:

 

Draw the truth table-

 

Inputs		Outputs
A	B	D (Difference)	b (Borrow)
0	0	0	0
0	1	1	1
1	0	1	0
1	1	0	0

Truth Table

 

Step-03:

 

Draw K-maps using the above truth table and determine the simplified Boolean expressions-

 

 

Also Read- Half Adder

 

Step-04:

 

Draw the logic diagram.

The implementation of half subtractor using 1 XOR gate, 1 NOT gate and 1 AND gate is as shown below-

 

 

Limitation of Half Subtractor-

 

• Half subtractors do not take into account “Borrow-in” from the previous circuit.
• This is a major drawback of half subtractors.
• This is because real time scenarios involve subtracting the multiple number of bits which can not be accomplished using half subtractors.

 

To overcome this drawback, Full Subtractor comes into play.

 

To gain better understanding about Half Subtractor,

Watch this Video Lecture

 

Next Article- Full Subtractor

 

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